<?xml version="1.0" encoding="utf-8" ?> <rss version="2.0" xmlns:opensearch="http://a9.com/-/spec/opensearch/1.1/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:atom="http://www.w3.org/2005/Atom"> <channel> <title> <![CDATA[Biblioteca UNILLANOS Search for 'an:114278,']]> </title> <!-- prettier-ignore-start --> <link> https://unillanos.metacatalogo.org/cgi-bin/koha/opac-search.pl?q=ccl=an%3A114278%2C&#38;sort_by=relevance&#38;format=rss </link> <!-- prettier-ignore-end --> <atom:link rel="self" type="application/rss+xml" href="https://unillanos.metacatalogo.org/cgi-bin/koha/opac-search.pl?q=ccl=an%3A114278%2C&#38;sort_by=relevance&#38;format=rss" /> <description> <![CDATA[ Search results for 'an:114278,' at Biblioteca UNILLANOS]]> </description> <opensearch:totalResults>2</opensearch:totalResults> <opensearch:startIndex>0</opensearch:startIndex> <opensearch:itemsPerPage>50</opensearch:itemsPerPage> <atom:link rel="search" type="application/opensearchdescription+xml" href="https://unillanos.metacatalogo.org/cgi-bin/koha/opac-search.pl?q=ccl=an%3A114278%2C&#38;sort_by=relevance&#38;format=opensearchdescription" /> <opensearch:Query role="request" searchTerms="q%3Dccl%3Dan%253A114278%252C" startPage="" /> <item> <title> VHDL: Lenguaje para Síntesis y Modelado de Circuitos / </title> <dc:identifier>ISBN:9701510178</dc:identifier> <!-- prettier-ignore-start --> <link>https://unillanos.metacatalogo.org/cgi-bin/koha/opac-detail.pl?biblionumber=20374</link> <!-- prettier-ignore-end --> <description> <![CDATA[ <p> By Pardo Carpio, Fernando.<br /> México : Alfaomega, 2004 .<br /> XIV, 251 páginas : , Incluye bibliografía e indice. | Material Acompañado por un Disco Compacto (CD-ROM), ubicado en la Colección Multimedia, identificado con el numero DC/621.392/P226v. 9701510178 </p> ]]> <![CDATA[ <p> <a href="https://unillanos.metacatalogo.org/cgi-bin/koha/opac-reserve.pl?biblionumber=20374">Place hold on <em>VHDL: Lenguaje para Síntesis y Modelado de Circuitos /</em></a> </p> ]]> </description> <guid>https://unillanos.metacatalogo.org/cgi-bin/koha/opac-detail.pl?biblionumber=20374</guid> </item> <item> <title> VHDL lenguaje para síntesis y modelado de circuitos / </title> <dc:identifier>ISBN:9786077071747</dc:identifier> <!-- prettier-ignore-start --> <link>https://unillanos.metacatalogo.org/cgi-bin/koha/opac-detail.pl?biblionumber=37204</link> <!-- prettier-ignore-end --> <description> <![CDATA[ <p> By Pardo Carpio, Fernando.<br /> México : Alfaomega, 2011 .<br /> 308 páginas : , Incluye bibliografía e indice. 24 centímetros..<br /> 9786077071747 </p> ]]> <![CDATA[ <p> <a href="https://unillanos.metacatalogo.org/cgi-bin/koha/opac-reserve.pl?biblionumber=37204">Place hold on <em>VHDL lenguaje para síntesis y modelado de circuitos /</em></a> </p> ]]> </description> <guid>https://unillanos.metacatalogo.org/cgi-bin/koha/opac-detail.pl?biblionumber=37204</guid> </item> </channel> </rss>
